Sr. Staff/Principal DSP Engineer
Description
Description
- Design and implement algorithms RTL code.
- Modeling, and analysis of high-speed long reach DSP based PAM4/PAMx Serdes transceiver.
- Work closely with system and test engineers to develop high speed interface, and system clocks in image sensor and bridge chip products.
Requirement
- MS or PhD in Electrical Engineering with +8 years expertise.
- Previous knowledge of long reach high-speed link like Ethernet and/or Serdes link standards.
- Able to implement DSP algorithms and digital echo cancellation into Verilog RTL code for logic synthesis.
- Experience with CTLE, DFE, CDR adaptation algorithms in PAM4/PAMx
Annual base salary for this role in California, US is expected to be between $150,000 - $240,000. Actual pay will be determined on a number of factors such as relevant skills and experience, and the pay of employees in the similar role.